On the Integration of Design and Test for Chips Embedding MEMS

for microelectromechanical systems (MEMS) emerge, research efforts shift toward the design of systems of increasing complexity. Focusing on higher-level design issues is being made possible by the development of hierarchical cell design methodologies, libraries of characterized MEMS elements, mixed-technology simulators, layout synthesis tools, and design rule checking tools. By incorporating an increasing number of features and moving toward monolithic integration, MEMS are evolving from simple components to whole systems. Increased miniaturization in conjunction with an ability for mixed integration with electronic circuits are key factors for the emergence of a new generation of chips embedding MEMS. This new generation of devices offers a tremendous potential in domains as varied as the biomedicine, automotive, and telecommunications industries. MEMS are high-growth markets, and projected growth requires significant advances in computeraided design, test, and manufacturing.1 At this early stage of development, research aspects concerning integrated design and test approaches and system validation techniques must be addressed before these chips can be moved from the laboratories to the field in a cost-effective manner. Many difficulties that can prevent the introduction of this new generation of chips are strongly related to test, including production testing costs, quality, and reliability verification. A manufactured product must be testable to ensure and prove the required quality and reliability levels. Currently, most MEMS applications correspond to low-volume niches, where functional testing is performed by adopting techniques from the test of analog electronics. The ways in which testing is going to be performed for large-volume complex devices embedding MEMS are not yet well-known, and research in this direction is just starting.2 With high safety requirements needed for most MEMS applications, achieving high quality and reliability can be addressed by the introduction of self-testing features (so far, just considered for testing of movement in accelerometers) or the use of online and fault tolerant techniques.3 The intimate linkage between form and function, a most relevant difference between MEMS and microelectronic circuits,4 stresses the need to build design models that make testing tasks, and fault injection in particular, possible. Adequate fault-free models often do not allow the injection of some types of faults, including faults caused by the most typical MEMS defects and parameter deviations.5 A structured design and test approach, based around an underlying Hardware Description Language, provides not only the On the Integration of Design and Test for Chips Embedding MEMS CHIPS EMBEDDING MEMS